Fault models and test generation for hardware-software covalidation

Hardware-software covalidation: fault models and test generation

The increasing use of hardware-software systems in costcritical and life-critical applications has led to heightened significance of design correctness of these systems. This paper presents a summary of research in hardware-software covalidation which involves the verification of design correctness using simulation-based techniques. This paper focuses on the test generation process for hardware...

Test generation for hardware-software covalidation using non-linear programming

Hardware-software covalidation involves the cosimulation of a system description with a functional test sequence. Functional test generation is heavily dependent on manual interaction, making it a time-consuming and expensive process. We present an automatic test generation technique to detect design errors in hardwaresoftware systems. The design errors targeted are those caused by incorrect sy...

Test Generation from Fault Models

A Uniform Test Generation Technique for Hardware/Software Systems

A novel hierarchical test generation technique for embedded systems containing hardware and software is proposed. Different from the traditional approaches, hardware and software parts of an embedded system are handled in a uniform way. We will in particular show how the proposed technique can be applied at the high levels of abstraction and how the software domain of the specification can also...

Fault-Model-Based Test Generation for Embedded Software

Testing embedded software systems on the control units of vehicles is a safety-relevant task, and developing the test suites for performing the tests on test benches is time-consuming. We present the foundations and results of a case study to automate the generation of tests for control software of vehicle control units based on a specification of requirements in terms of finite state machines....